Plosila, Juha

name

• Plosila, Juha

Authored works

• Action systems in pipelined processor design
• Action systems synthesis of DI circuits
• An asynchronous linear predictive analyzer
• Component-based asynchronous circuit design in B
• Formal derivation of an on-chip communication platform
• Formal specification of an asynchronous on-chip bus
• Refinement of atomic communication channels towards on-chip implementation
• Self-timed circuit design : the action systems approach
• Synchronization of action systems
• Synchronous action systems

Works contributed to

• Applications for the SPIN model checker : a survey
• Asynchronous Viterbi decoder in action systems
• Feasibility report on asynchronous synthesis
• Formal channel based modeling of SoC systems
• Formal energy estimation framework
• High level power estimation
• Internal structure of an enhanced Java execution engine
• Modeling SoC systems with flow control
• Network on chip routing algorithms
• On fault tolerance techniques towards nanoscale circuits and systems
• On-chip communications models
• Synchronous pipeline design in action systems
• Towards a formal power estimation framework
• Verification of a song selection algorithm with SPIN

Works about Plosila, Juha