Designing globally-asynchronous locally-synchronous on-chip communication networks

URI: http://urn.fi/URN:NBN:fi:bib:me:W00055032800
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  • Designing globally-asynchronous locally-synchronous on-chip communication networks
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Designing globally-asynchronous locally-synchronous on-chip communication networks

URI: http://urn.fi/URN:NBN:fi:bib:me:I00055032801
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  • Designing globally-asynchronous locally-synchronous on-chip communication networks
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Designing globally-asynchronous locally-synchronous on-chip communication networks

URI: http://urn.fi/URN:NBN:fi:bib:me:I00055032800
datePublished
  • 2008
description
  • Kansinimeke: Designing globally-asynchronous locally-synchronous on-chip communication network.
  • kuvitettu
identifier
  • propertyID: FI-FENNI value: 893698
  • propertyID: FI-MELINDA value: 000550328
  • propertyID: skl value: fx893698
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  • 9789521519871
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  • Designing globally-asynchronous locally-synchronous on-chip communication networks
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  • xviii, 90, [71] s.
P60048
P60050
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  • location: Tampere organizer: Tampereen teknillinen korkeakoulu Tampereen teknillinen yliopisto. Optoelektroniikan tutkimuskeskus
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