Nonmonotone norm-reduction method in numerical circuit analysis

Nonmonotone norm-reduction method in numerical circuit analysis

datePublished

• 2002

description

• kuvitettu

identifier

• propertyID: FI-FENNI value: 713502
• propertyID: FI-MELINDA value: 000256963
• propertyID: skl value: fx713502

isbn

• 9512260395

isPartOf

• Circuit Theory Laboratory report series / Helsinki University of Technology, Department of Electrical and Communications Engineering
• Fennica

name

• Nonmonotone norm-reduction method in numerical circuit analysis

numberOfPages

• ii, 8, [2] s.

P60048

• <http://rdaregistry.info/termList/RDACarrierType/1049>

P60050

• <http://rdaregistry.info/termList/RDAMediaType/1007>

publication

• location: Espoo organizer: Teknillinen korkeakoulu

publisher

• Teknillinen korkeakoulu