Circuits insensitive to delays in transistors and wires

Circuits insensitive to delays in transistors and wires

datePublished

• 1989

description

• kuvitettu

identifier

• propertyID: FI-FENNI value: 222079
• propertyID: FI-MELINDA value: 000057216
• propertyID: skl value: fx222079

isbn

• 9512203456

isPartOf

• Fennica
• Tek. korkeak., Maanmit.os., Geod. kartogr. lab., Geod

name

• Circuits insensitive to delays in transistors and wires

numberOfPages

• i, 42, [2] s.

P60048

• <http://rdaregistry.info/termList/RDACarrierType/1049>

P60050

• <http://rdaregistry.info/termList/RDAMediaType/1007>

publication

• location: Espoo organizer: Teknillinen korkeakoulu

publisher

• Teknillinen korkeakoulu