Code constructions for error control in byte organized memories in microprocessor systems

Code constructions for error control in byte organized memories in microprocessor systems

datePublished

• 1987

description

• Abstract nimiösivulla.
• kuvitettu

identifier

• propertyID: FI-FENNI value: 103819
• propertyID: FI-MELINDA value: 003785129
• propertyID: skl value: fx103819

isbn

• 9517542038

isPartOf

• Fennica
• Research report / Helsinki University of Technology, Faculty of Electrical Engineering, Applied Computer Science Laboratory
• Teknillinen korkeakoulu. Sähkötekniikan osasto. Laitteistotekniikka. Research report

name

• Code constructions for error control in byte organized memories in microprocessor systems

numberOfPages

• [2], 20 s.

P60048

• <http://rdaregistry.info/termList/RDACarrierType/1049>

P60050

• <http://rdaregistry.info/termList/RDAMediaType/1007>

publication

• location: Otaniemi organizer: Teknillinen korkeakoulu

publisher

• Teknillinen korkeakoulu