Design and implementation of parallel memory architectures

URI: http://urn.fi/URN:NBN:fi:bib:me:W00046079500
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inLanguage
  • en
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name
  • Design and implementation of parallel memory architectures
P60049

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Design and implementation of parallel memory architectures

URI: http://urn.fi/URN:NBN:fi:bib:me:I00046079501
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isPartOf
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  • Design and implementation of parallel memory architectures
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Design and implementation of parallel memory architectures

URI: http://urn.fi/URN:NBN:fi:bib:me:I00046079500
datePublished
  • 2006
description
  • kuvitettu
  • Tiivistelmä ja 10 erip.
identifier
  • propertyID: FI-FENNI value: 847647
  • propertyID: FI-MELINDA value: 000460795
  • propertyID: skl value: fx847647
isbn
  • 9521516895
isPartOf
name
  • Design and implementation of parallel memory architectures
numberOfPages
  • xix, 67, [90] s.
P60048
P60050
publication
  • location: Tampere organizer: Tampereen teknillinen korkeakoulu Tampereen teknillinen yliopisto. Optoelektroniikan tutkimuskeskus
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