A VHDL simulator in a co-verification environment

URI: http://urn.fi/URN:NBN:fi:bib:me:W00018437100
author
inLanguage
  • en
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name
  • A VHDL simulator in a co-verification environment
P60049

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A VHDL simulator in a co-verification environment

URI: http://urn.fi/URN:NBN:fi:bib:me:I00018437101
description
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name
  • A VHDL simulator in a co-verification environment
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A VHDL simulator in a co-verification environment

URI: http://urn.fi/URN:NBN:fi:bib:me:I00018437100
datePublished
  • 1998
description
  • kuvitettu
identifier
  • propertyID: FI-FENNI value: 617807
  • propertyID: FI-MELINDA value: 000184371
  • propertyID: skl value: fx617807
isbn
  • 9513852458
isPartOf
name
  • A VHDL simulator in a co-verification environment
numberOfPages
  • 91, [7] s.
P60048
P60050
publication
  • location: Espoo organizer: Valtion teknillinen tutkimuskeskus
publisher

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